1. Field of the Invention
This invention relates to the field of video circuits. More particularly, this invention relates to a circuit for detecting synchronizing pulses embedded in composite waveforms of a video signal.
2. Description of the Related Art
FIG. 1 illustrates components of a composite video waveform. The composite video waveform contains: a horizontal sync pulse or sync tip used for receiver scan timing; a “breezeway” where the level is a reference for video intensity; a color burst which is a series of sinewaves at a very precise frequency and phase, used as a color reference; a back porch which is a level reference similar to the breezeway occurring after the color burst segment; and the picture occurring after the back porch, the picture being any possible signal up to a maximum level, and whose content is unpredictable to receiver electronics.
The video receiver systems must discover timing details from the sync tip. Unfortunately, the sync tip almost never has a known DC level. In fact, most composite signals are AC coupled and the average DC level varies unpredictably with picture content.
One method for providing a video signal timing reference is to use a circuit which uses the most negative going feature of the composite signal as a reference level. The composite video signal standard which is predominantly used in North America, the National Television Systems Committee (NTSC) standard, was designed to enable such a reference level to be set approximately 50 years ago.
A prior art circuit for setting a reference level at the most negative feature of a composite waveform is the clamping circuit shown in FIG. 2. The circuit includes a capacitor 200 having an input receiving the composite video signal input, and an output providing the composite video signal with its most negative voltage clamped to 0 volts. The circuit further includes a diode 202 and current sink 204 connecting the output of the capacitor 200 to ground. The diode 202 is assumed to be ideal so that it generates no DC offset. The current sink 204 provides a small pull down current IPULLDOWN to discharge the capacitor 200 and allow the clamped output signal to follow the varying content of the composite input.
A clamped output signal from the circuit of FIG. 2 is shown in FIG. 3. As shown in FIG. 3, the diode of FIG. 2 forces the capacitor coupled composite video signal's most negative voltage, here the sync tip voltage (VTIP), to ground level. Because the composite video signal provides transient currents, clamping may distort the composite signal and may be an undesirable method.
To provide a synchronization (sync) timing signal, the clamped output of the circuit of FIG. 2 is provided to a first terminal of comparator 400 shown in FIG. 4, while a DC offset voltage is provided to the second terminal of comparator 400. The sync timing signal is generated when the comparator output transitions. A DC voltage offset generator 402 provides the DC offset voltage at a desired “slice level” (VSLICE), as shown in FIG. 3, so that the sync timing signal is generated on an edge of the sync pulse at the voltage VSLICE approximately midway between the sync tip voltage level VTIP and the breezeway voltage level.